校正位用英语怎么说，校正位的英文翻译

词语导航

基本信息

词语：校正位

繁体：校正位

拼音：xiào zhèng wèi

英语翻译

【计】 correction bit

分词翻译

校正的英语翻译：

adjustment; emendation; proofread; rectify; revise
【计】 updating
【化】 correction
【医】 correction

位的英语翻译：

digit; location; place; potential; throne
【计】 D
【化】 bit
【医】 P; position
【经】 bit

翻译例句

1. 按“-键”画面自动下行到零点校正位并停止运行。

Press "-", and the image will automatically run down to the zero-point calibration position and then stop.

2. 阀杆经特别处理以确保最佳固定，并能自动校正位置。

Stem, by special treatment to ensure that the best fixed, and can automatically correct location.

3. 可以看到，为了简化，输入电压未被采样到这些校正位电容器上。

It can be seen that, for simplicity, the input voltage is not sampled onto these correction bit capacitors.

4. 结果，较低有效位和校正位或者校正电容器有可能驻留在子阵列中。

As a consequence the bits of lower significance and the correction bits or correction capacitors are likely to reside in a sub array.

5. 以与位50相同的方式而实现的多个其它的校正位56,57等被提供。

A plurality of other correction bits 56, 57 and so on implemented in the same way as bit 50 are provided.

6. 注意用具有3个校正位的12位转换器的特定情况描述了引入偏移以提高转换的分辨率。

Introducing an offset to increase the resolution of the conversion has been described with the specific case of a 12 bit converter with 3 correction bits in mind.wWW.wENtiYi.COm

7. 核心部件80C196KC单片机通过预先计算的太阳位置进行跟踪，并通过光学传感器校正位置量可能出现的误差。

With SMC 80C196KC as the controller, mathematical formulas are used to predict the sun"s location for tracking and optical sensors are used to correct errors which might occur in the process.

8. 然而，虽然在这种情况下允许校正位从前面的很大的噪声事件进行一定的恢复，但是这些校正位本身易于受噪声的影响。

However, although in this case the correction bits allowed some recovery from a previous very large noise event, these correction bits themselves are prone to noise.

9. 每个校正位试验的作用是如果(具有任何符号的)大噪声事件已对在前位试验做出了错误的判定，则使得ADC减少DAC误差。

The effect of each correction bit trial is to allow the ADC to reduce the DAC error if a large noise event (of either sign) has caused a wrong decision to be made on a previous bit trial.

10. 每个校正位试验的作用是如果(具有任何符号的)大噪声事件已对在前位试验做出了错误的判定，则使得ADC减少DAC误差。

The effect of each correction bit trial is to allow the ADC to reduce the DAC error if a large noise event (of either sign) has caused a wrong decision to be made on a previous bit trial.